H. Pearce
Latest
- From CVE Entries to Verifiable Exploits: An Automated Multi-Agent Framework for Reproducing CVEs
- From CVE Entries to Verifiable Exploits: An Automated Multi-Agent Framework for Reproducing CVEs
- SoK: The Security-Safety Continuum of Multimodal Foundation Models through Information Flow and Global Game-Theoretic Analysis of Asymmetric Threats
- SoK: The Security-Safety Continuum of Multimodal Foundation Models through Information Flow and Global Game-Theoretic Analysis of Asymmetric Threats
- Counterfeits and kill switches: How hardware security can impact you
- Counterfeits and kill switches: How hardware security can impact you
- Experiences scaffolding a computer engineering project course to improve student outcomes
- Experiences scaffolding a computer engineering project course to improve student outcomes
- Hardware Design and Security Needs Attention: From Survey to Path Forward
- Hardware Design and Security Needs Attention: From Survey to Path Forward
- High-Fidelity Specification of Real-World Devices
- High-Fidelity Specification of Real-World Devices
- LASHED: LLMs And Static Hardware Analysis for Early Detection of RTL Bugs
- LASHED: LLMs And Static Hardware Analysis for Early Detection of RTL Bugs
- Logic Meets Magic: LLMs Cracking Smart Contract Vulnerabilities
- Logic Meets Magic: LLMs Cracking Smart Contract Vulnerabilities
- Mitigation of Cyber-physical Attacks in Industry 4.0 using Secure Function Blocks
- Mitigation of Cyber-physical Attacks in Industry 4.0 using Secure Function Blocks
- Netlist whisperer: extensive analysis of circuit leakage using LLMs
- Netlist whisperer: extensive analysis of circuit leakage using LLMs
- On cyber sabotage risks in automated manufacturing of advanced composites
- On cyber sabotage risks in automated manufacturing of advanced composites
- Towards LLM-based Root Cause Analysis of Hardware Design Failures
- Towards LLM-based Root Cause Analysis of Hardware Design Failures
- What's Pulling the Strings? Evaluating Integrity and Attribution in AI Training and Inference through Concept Shift
- What's Pulling the Strings? Evaluating Integrity and Attribution in AI Training and Inference through Concept Shift
- (Security) Assertions by Large Language Models
- (Security) Assertions by Large Language Models
- ARVO: Atlas of Reproducible Vulnerabilities for Open Source Software
- ARVO: Atlas of Reproducible Vulnerabilities for Open Source Software
- dcc - Help: Transforming the Role of the Compiler by Generating Context-Aware Error Explanations with Large Language Models
- dcc - Help: Transforming the Role of the Compiler by Generating Context-Aware Error Explanations with Large Language Models
- Evaluating LLMs for Hardware Design and Test
- Evaluating LLMs for Hardware Design and Test
- FEINT: Automated Framework for Efficient INsertion of Templates/Trojans into FPGAs
- FEINT: Automated Framework for Efficient INsertion of Templates/Trojans into FPGAs
- Large Language Models for Hardware Security (Invited, Short Paper)
- Large Language Models for Hardware Security (Invited, Short Paper)
- LLM-aided explanations of EDA synthesis errors
- LLM-aided explanations of EDA synthesis errors
- LLMs Cannot Reliably Identify and Reason about Security Vulnerabilities (Yet?): A Comprehensive Evaluation, Framework, and Benchmarks
- LLMs Cannot Reliably Identify and Reason about Security Vulnerabilities (Yet?): A Comprehensive Evaluation, Framework, and Benchmarks
- MUDDLE: Multi-Modal Dynamic Detector Loopback Evaluator to Expose Trojans in Zero-Trust PCB Systems
- MUDDLE: Multi-Modal Dynamic Detector Loopback Evaluator to Expose Trojans in Zero-Trust PCB Systems
- Offramps: An FPGA-Based Intermediary for Analysis and Modification of Additive Manufacturing Control Systems
- Offramps: An FPGA-Based Intermediary for Analysis and Modification of Additive Manufacturing Control Systems
- On Hardware Security Bug Code Fixes By Prompting Large Language Models
- On Hardware Security Bug Code Fixes By Prompting Large Language Models
- Runtime Verified Neural Networks for Cyber-Physical Systems
- Runtime Verified Neural Networks for Cyber-Physical Systems
- Scalable Security Enforcement for Cyber Physical Systems
- Scalable Security Enforcement for Cyber Physical Systems
- Toward Hardware Security Benchmarking of LLMs
- Toward Hardware Security Benchmarking of LLMs
- A survey of Digital Manufacturing Hardware and Software Trojans
- A survey of Digital Manufacturing Hardware and Software Trojans
- An Integrated Testbed for Trojans in Printed Circuit Boards with Fuzzing Capabilities
- An Integrated Testbed for Trojans in Printed Circuit Boards with Fuzzing Capabilities
- Are Emily and Greg Still More Employable than Lakisha and Jamal? Investigating Algorithmic Hiring Bias in the Era of ChatGPT
- Are Emily and Greg Still More Employable than Lakisha and Jamal? Investigating Algorithmic Hiring Bias in the Era of ChatGPT
- AutoChip: Automating HDL Generation Using LLM Feedback
- AutoChip: Automating HDL Generation Using LLM Feedback
- Benchmarking Large Language Models for Automated Verilog RTL Code Generation
- Benchmarking Large Language Models for Automated Verilog RTL Code Generation
- Can Large Language Models Identify And Reason About Security Vulnerabilities? Not Yet
- Can Large Language Models Identify And Reason About Security Vulnerabilities? Not Yet
- Chip-Chat: Challenges and Opportunities in Conversational Hardware Design
- Chip-Chat: Challenges and Opportunities in Conversational Hardware Design
- dcc -help: Transforming the Role of the Compiler by Generating Context-Aware Error Explanations with Large Language Models
- dcc -help: Transforming the Role of the Compiler by Generating Context-Aware Error Explanations with Large Language Models
- Decoding ChatGPT's 'impact' on the future of healthcare
- Decoding ChatGPT's 'impact' on the future of healthcare
- Examining Zero-Shot Vulnerability Repair with Large Language Models
- Examining Zero-Shot Vulnerability Repair with Large Language Models
- Fixing Hardware Security Bugs with Large Language Models
- Fixing Hardware Security Bugs with Large Language Models
- FLAG: Finding Line Anomalies (in code) with Generative AI
- FLAG: Finding Line Anomalies (in code) with Generative AI
- High-Level Approaches to Hardware Security: A Tutorial
- High-Level Approaches to Hardware Security: A Tutorial
- Invited Paper: Towards the Imagenets of ML4EDA
- Invited Paper: Towards the Imagenets of ML4EDA
- Lost at C: A User Study on the Security Implications of Large Language Model Code Assistants
- Lost at C: A User Study on the Security Implications of Large Language Model Code Assistants
- Multi-Modal Side Channel Data Driven Golden-Free Detection of Software and Firmware Trojans
- Multi-Modal Side Channel Data Driven Golden-Free Detection of Software and Firmware Trojans
- Netlist Whisperer: AI and NLP Fight Circuit Leakage!
- Netlist Whisperer: AI and NLP Fight Circuit Leakage!
- REMaQE - Reverse Engineering Math Equations from Executables
- REMaQE - Reverse Engineering Math Equations from Executables
- Towards the Imagenets of ML4EDA
- Towards the Imagenets of ML4EDA
- VeriGen: A Large Language Model for Verilog Code Generation<sup>∗</sup>
- VeriGen: A Large Language Model for Verilog Code Generation<sup>∗</sup>
- Application of micro-computed tomography for authentication of 3D printed composite parts
- Application of micro-computed tomography for authentication of 3D printed composite parts
- Asleep at the Keyboard? Assessing the Security of GitHub Copilot's Code Contributions
- Asleep at the Keyboard? Assessing the Security of GitHub Copilot's Code Contributions
- Detecting Hardware Trojans in PCBs Using Side Channel Loopbacks
- Detecting Hardware Trojans in PCBs Using Side Channel Loopbacks
- Determination of Fiber Content in 3D Printed Composite Parts Using Image Analysis
- Determination of Fiber Content in 3D Printed Composite Parts Using Image Analysis
- Don t CWEAT it: Toward CWE analysis techniques in early stages of hardware design
- Don t CWEAT it: Toward CWE analysis techniques in early stages of hardware design
- Don't CWEAT It: Toward CWE Analysis Techniques in Early Stages of Hardware Design
- Don't CWEAT It: Toward CWE Analysis Techniques in Early Stages of Hardware Design
- FLAW3D: A Trojan-Based Cyber Attack on the Physical Outcomes of Additive Manufacturing
- FLAW3D: A Trojan-Based Cyber Attack on the Physical Outcomes of Additive Manufacturing
- Pop Quiz! Can a Large Language Model Help With Reverse Engineering?
- Pop Quiz! Can a Large Language Model Help With Reverse Engineering?
- Runtime Interchange of Enforcers for Adaptive Attacks: A Security Analysis Framework for Drones
- Runtime Interchange of Enforcers for Adaptive Attacks: A Security Analysis Framework for Drones
- An empirical cybersecurity evaluation of GitHub Copilot's code contributions
- An empirical cybersecurity evaluation of GitHub Copilot's code contributions
- Designing Neural Networks for Real-Time Systems
- Designing Neural Networks for Real-Time Systems
- Needle in a Haystack: Detecting Subtle Malicious Edits to Additive Manufacturing G-code Files
- Needle in a Haystack: Detecting Subtle Malicious Edits to Additive Manufacturing G-code Files
- Runtime interchange for adaptive re-use of intelligent cyber-physical system controllers
- Runtime interchange for adaptive re-use of intelligent cyber-physical system controllers
- Uncertainty quantification in dimensions dataset of additive manufactured NIST standard test artifact
- Uncertainty quantification in dimensions dataset of additive manufactured NIST standard test artifact
- A compositional approach using Keras for neural networks in real-time systems
- A compositional approach using Keras for neural networks in real-time systems
- DAVE: Deriving automatically verilog from English
- DAVE: Deriving automatically verilog from English
- Smart I/O Modules for Mitigating Cyber-Physical Attacks on Industrial Control Systems
- Smart I/O Modules for Mitigating Cyber-Physical Attacks on Industrial Control Systems
- Securing implantable medical devices with runtime enforcement hardware
- Securing implantable medical devices with runtime enforcement hardware
- Synthesizing IEC 61499 function blocks to hardware
- Synthesizing IEC 61499 function blocks to hardware
- Faster function blocks for precision timed industrial automation
- Faster function blocks for precision timed industrial automation
- Synchronous neural networks for cyber-physical systems
- Synchronous neural networks for cyber-physical systems
- A model driven approach for cardiac pacemaker design using a PRET processor
- A model driven approach for cardiac pacemaker design using a PRET processor