Benjamin Tan
Latest
- Automatically Improving LLM-based Verilog Generation using EDA Tool Feedback
- Automatically Improving LLM-based Verilog Generation using EDA Tool Feedback
- FLAG: F inding L ine A nomalies (in RTL code) with G enerative AI
- FLAG: F inding L ine A nomalies (in RTL code) with G enerative AI
- VeriGen: A Large Language Model for Verilog Code Generation
- VeriGen: A Large Language Model for Verilog Code Generation